At Cerebras, we’ve defied conventional wisdom by successfully building a chip 50x larger than traditional computer chips while maintaining comparable yields. This achievement challenges the notion that bigger chips result in worse yields, showcasing a new approach to manufacturing technology. By rethinking the relationship between chip size and fault tolerance, we have developed the Cerebras Wafer Scale Engine with impressive defect tolerance. Our innovative design includes a small fault-tolerant core and a sophisticated routing architecture that dynamically reconfigures connections between cores to ensure high yields. The result is a wafer-scale processor that achieves 93% silicon utilization, surpassing leading AI accelerators in efficiency and demonstrating the commercial viability of wafer-scale computing.
https://cerebras.ai/blog/100x-defect-tolerance-how-cerebras-solved-the-yield-problem