Box64 and RISC-V

Developers are working to add dynarec support for RISC-V architecture in the current development cycle of box64. Box64 allows x86_64 programs to run on RISC-V ISA, a CPU architecture that prioritizes simplicity and reduced instruction sets over complex opcode, which can use more CPU transistors. Using the VisionFive2 development board and thanks to external contributors ksco and xctan, the RISC-V dynarec is already “quite complete” and games are playable on the VF2. However, the generated code can be complex, and x86_64 programs require more opcodes to run on RISC-V than their native counterparts.

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