Hardware FPGA DPS-8M Mainframe and FNP Project

Dean S. Anderson is leading an ambitious project to implement as much of the DPS-8/M mainframe architecture using FPGAs to run the full Multics operating system. This project started as a long-term hobby idea with the goal of emulating historical minicomputers and mainframes. The project began by working on the Front-end Network Processor component, specifically the DATANET 355, and transitioning to FPGA development. Utilizing ARM CPU cores integrated within FPGAs, the goal is to eventually simulate the complete DPS-8/M system. Progress has been made with the CPU simulation, paged RAM, IOM implementation, and interrupt controller. Check out discussions on the project’s GitLab repository and Slack workspace for updates.

https://dps8m.gitlab.io/blog/posts/20240622_FPGA/

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