In the latest Linux 6.7 update, there have been significant advancements for the RISC-V architecture. Notably, the addition of support for upcoming Sophgo RISC-V chips, including a 64 core CPU, has generated excitement. Furthermore, the Milk-V Pioneer, a unique 64-bot mATX workstation board, will soon be available for purchase at $1499. Additionally, improvements for the RISC-V architecture include support for cbo.zero in user-space, CBOs on ACPI-based systems, software shadow call stacks, T-Head cache flushing operations, and various clean-ups and fixes. The RISC-V Shadow Call Stack support enhances security by storing and checking the return memory address through compiler instrumentation. LLVM Clang 17 is required for this functionality, as there is currently no GCC support. Further RISC-V changes for Linux 6.7 include handling misaligned accesses, performance enhancements for TLB flushing, support for new relocations in the module loader, and other improvements.
https://www.phoronix.com/news/Linux-6.7-RISC-V