The author presents a FPGA-based 64-bit RISC-V computer that can run the riscv64 port of Fedora. The machine can recompile its own software and gateware (FPGA bitstream) from source code, providing complete control of the hardware development process. The author emphasizes the similarities between hardware and software development and highlights the potential vulnerabilities that can be inserted at different stages of the lifecycle. They propose using soft-IP-core hardware blocks on FPGAs to mitigate against ASIC fabrication-time backdoor insertion and insist on openly available sources and self-hosting capabilities to address HDL source and toolchain vulnerability insertion. They demonstrate a Fedora capable RISC-V computer using the Rocket CPU and a fully Free/Libre toolchain.
https://archive.fosdem.org/2023/schedule/event/rv_selfhosting_all_the_way_down/