The 65F02 is a re-implementation of the 65C02 CPU in an FPGA, allowing for a clock rate of 100 MHz. Developed by Arlet Ottens, Ed Spittles, and David Banks, the 65F02 is designed to be a universal accelerator that can be plugged into the CPU socket of various 6502 and 65C02-based computers. The FPGA board copies the RAM and ROM content from the host computer upon power-on, except for the I/O area. The 65F02 has been successfully tested in Mephisto chess computers, Apple II, and Commodore 8032. The project is a hobby project and not planned for commercialization.
https://www.e-basteln.de/computing/65f02/65f02/