XiangShan is an open-source high-performance RISC-V processor project developed by the Institute of Computing Technology, Chinese Academy of Sciences and Peng Cheng Laboratory. The project aims to accelerate chip development through agile methodology, with tools for design, verification, debugging, and performance validation. The micro-architecture documentation includes stable versions like Yanqihu and Nanhu, with the current version Kunminghu still in development. The project offers architecture details, directories overview, IDE support, and guidance on running programs through simulation. XiangShan is inspired by key papers, encouraging further academic innovations. Follow XiangShan on Wechat, Zhihu, and Weibo for updates.
https://github.com/OpenXiangShan/XiangShan