Zero ASIC, a semiconductor startup based in Cambridge, Massachusetts, has emerged from stealth mode with its innovative ChipMaker platform. The platform boasts several world firsts, including 3D chiplet composability, fully automated no-code chiplet-based chip design, and zero install interactive RTL-based chip emulation. Zero ASIC aims to reduce the barrier to ASICs by making the ordering process as simple as ordering catalog parts. Traditional chip design costs and timelines are a major obstacle, and Zero ASIC’s chiplet-based design addresses this issue by streamlining the process and hiding the complexities of circuit design. The company has also developed eFabric, an active 3D interposer that improves die-to-die communication efficiency. These advancements offer unprecedented performance levels and flexibility. Zero ASIC’s composable chiplet ASICs are well-suited for applications in various industries, such as robotics, automotive safety, aerospace and defense, communication, and high-performance computing. The company’s ChipMaker platform is available for immediate access, and customized ASICs are expected to begin sampling in Q3 2024.
https://www.zeroasic.com/blog/zero-asic-democratizing-chip-making